1. Field of the Invention
The present invention relates to a method used to create metal interconnect structures, for semiconductor devices, and more specifically to a method used to improve the adhesion of a copper layer, used as a component of the metal interconnect structure, to underlying surfaces.
2. Description of Prior Art
The objectives of the semiconductor industry is to continually improve performance of semiconductor devices, while still attempting to decrease the cost of these same semiconductor devices. Micro-miniaturization, or the ability to create semiconductor devices with sub-micron features, have allowed the performance and cost objectives to be successfully addressed. For example smaller features result in a decrease in performance degrading capacitances and resistances, for device regions in the semiconductor substrate. In addition the use of sub-micron features, allow smaller semiconductor chips to be realized, however still possessing device density comparable to densities achieved with larger semiconductor chip counterparts. This allows more chips to be realized from a specific size starting substrate, thus reducing the processing cost for a specific semiconductor chip.
One area in which micro-miniaturization has adversely influenced performance, is the metal interconnect structures. Although the resistance of metal interconnect structures is reduced by the decreasing lengths of the metal runs, a reduction in the thickness of the metal lines, necessitated in order to reduce topography, results in resistance increases for the thinner metal lines. One solution for higher resistance, thinner metal interconnect structures, is the use of lower resistivity, copper interconnect structures, in place of the higher resistivity, aluminum based, interconnect structures. The use of copper interconnect structures, however, introduce several new concerns, that were not relevant with the aluminum based metallization. First, copper must be separated from underlying dielectric layers, or from semiconductor regions, due to the interaction of copper with insulator or silicon layers. Therefore barrier layers are used, underlying copper layers, preventing the deleterious effects of copper in silicon, or in silicon oxide layers. In addition the adhesion between copper and underlying barrier layers is not as strong as the adhesion between aluminum and underlying dielectric materials, therefore an adhesion layer is sometimes added to metal interconnect structures, in which copper is used as the major conductive component.
Prior art, such as Gelatos, et al, in U.S. Pat. No. 5,391,517, describe an interconnect structure, using copper as the main current carrying component, in which a layer of titanium nitride is used as a barrier layer, to prevent unwanted copper from entering underlying materials. This prior art also uses a titanium-copper, intermetallic layer, placed between the copper layer, and the underlying titanium nitride layer, to improve copper adhesion to underlying materials. The present invention will describe a novel process of forming a copper-germanium, (Cu.sub.3 Ge), intermetallic layer, to be used as an adhesive layer for copper. The advantages of the Cu.sub.3 Ge adhesive layer is a lower resistivity than counterpart adhesive layers, thus positively influencing performance. In addition the process used for this novel intermetallic adhesion layer, can be simplified via the use of a cluster tool for in situ deposition of the titanium nitride barrier layer, as well as for the deposition of both copper and germanium layers.